1. Field of the Invention
The present invention is related to a transceiver architecture adaptable to the user and/or the environment at minimum power cost.
2. Description of the Related Technology
Analogue and digital designs are still fairly separated. The individual single building blocks are optimized for a single case, being the worst case. Typically, a building block has very little tunability because of the design complexity.
Receiver front-ends for broadband wireless communication, for which wireless LANs are an emerging driver, should provide good sensitivity and high linearity to accommodate various modulation schemes up to 64-QAM. Analogue circuits cannot meet all specifications for the entire receive power range without reconfiguration.
Wireless LANs at 5 GHz, based on orthogonal frequency division multiplex (OFDM), pave the way for further large-scale deployment of high-bit rate data transmission into the home consumer market.
Stringent dynamic range requirement of the analog front-end lead to high cost implementation. For the digital receiver, especially in the case of a non-constant envelope modulation scheme such as OFDM, it is important that the received signal becomes digitized without saturation in the front-end.
A short settling time in which to configure the analog front-end optimally for a temporary receive signal strength at the antenna is needed. Wireless LANs according to the IEEE 802.11a or to the similar HiperLAN/2 standard, provide only short preambles for acquisition purposes.
The multitude of completely analogue feedback solution can neither handle the distributed nature of problem, hence they cannot be fast and precise at the same time, nor offer equivalent controllability.
There are a lot of patents that tackle the problem of optimizing only one parameter in the design, like for example the automatic gain control (e.g. in US005627857A, US005917865A and US005825239A).